☰
C
Chip
Xpert
Lab
Online HDL Playground
← All tools
🌙 Theme
Learn VLSI →
—
▶ Simulate
◇ Lint
⚙ Synthesize
▣ RTL → GDS
✔ Verify (cocotb)
▶ Run SV testbench
✔ Prove (formal)
⬇ Waveform (VCD)
⬇ Netlist (.v)
design.sv
tb.sv — testbench
Console
Clear
Pick a lab from the left, then press Simulate. Jobs run in an isolated sandbox (no network, hard time & memory limits). Your code is deleted after each run.